Semiconductors and integrated circuits (IC or chips) have become ubiquitous within many products, particularly as they continue to decrease in cost and size. There is a continuous desire to reduce the size of structural features and/or to provide a greater number of structural features for a given chip size. Miniaturization, in general, allows for increased performance at lower power levels and lower cost. Present technology is at or approaching atomic level scaling of certain devices such as field-effect transistors.
A field-effect transistor (FET) is a transistor having a source, a gate, and a drain, and operates based on the flow of carriers (electrons or holes) along a channel that runs between the source and drain. Current through the channel between the source and drain is controlled by a transverse electric field applied at the gate.
FETs are widely used for switching, amplifying, filtering, and other tasks. FETs include metal-oxide-semiconductor (MOS) FETs (MOSFETs). Complementary MOS (CMOS) devices are widely used, where both n-type and p-type transistors (NFET and PFET) are used to fabricate logic and other circuitry in IC devices. Source and drain regions of a conventional lateral FET are typically formed by adding dopants to target regions of a semiconductor body on either side of a channel, with the gate being formed above the channel. The gate includes a gate dielectric over the channel and a gate conductor over the gate dielectric. The gate dielectric is an insulator material that prevents large leakage current from flowing into the channel when voltage is applied to the gate conductor while allowing applied gate voltage to produce a transverse electric field in the channel.
Increasing demand for high density and performance in IC devices requires development of new structural and design features, including shrinking gate lengths and other reductions in size or scaling of devices. Continued scaling, however, is reaching limits of conventional fabrication techniques.
Vertical transport FETS (VTFETs) have become a promising alternative to the conventional lateral FET structures due to potential benefits including, among others, reduced circuit footprint. In a VTFET structure, the current flow is perpendicular to the supporting wafer (substrate) as compared with parallel current flow in a conventional lateral FET structure. As such, VTFETs can provide devices with improved circuit density. However, challenges exist in terms of layout-level implications when using VTFETs in ICs.